FPGA Technology and Software IP in Power Electronics Applications

IP for FPGAs: What Does the Future Hold?

Warren Miller has recently posted a series of articles on All Programmable Planet website titled “IP for FPGAs: What Does the Future Hold ?”. I took time to add my two-cents in the conversation:

“Hi Warren and congrats for this excellent series of post.

I completely agree with the idea of having IP blocks that include not only the desired function, but also a bundle of verification functions that help designers to reach their ultimate goal: having a fully working system on time and within budget.

In my area of expertise – motor control software IP – this is particularly important since the application is the management of energy and if an error occurs, this can lead to important system damage (i.e. burn a motor / power stage). Not just a simple “system reboot”.

However, the design of such verification function is a field of expertise in itself that’s entirely related to the expertise domain (i.e. motor control, this is true also for other complex applications such as image processing). Also, the translation of those functions into a form that’s usable by a third-party (which can be internal or external) has also a cost (testing, documentation, etc.).

This is true for DSP/MCU-based design which are only SW configurable devices. Hence, for FPGA-based designs, which have an order of complexity higher than DSP/MCU based design (because of the programmability of the HW), it is obvious that it is also true.

I think the fullfillement of those needs belong to 3rd party system-level IP providers (such as Alizem in the field of motor control), i.e. who package their domain expertise in the form of a licensable IP products.

This is exactly the topic I have presented last month at the IEEE Industrial Electronics Society (IES) Annual meeting for which I have been invited speaker of the Industry Forum. You can access my presentation on my blog:

FPGA-based Custom Motor Drives Design: The Role of 3rd-party System-Level IP

The conclusion of this presentation is: the role of 3rd-party system-level IP providers is to provide products that makes it so easy to the system designers that they can bring their own system to the next level (i.e. focus on their true product differentiation).

Just like Google did with its “self-driving” car.

Best Regards, Marc.”

FPGA-based motor control – A Review of 2011

To begin 2012, let’s recap major events/announcements that have been made in the exciting world of FPGA-based motor control during 2011:

FPGA vendors

In March, Microsemi announced its new Industrial Ecosystem for SmartFusion Intelligent Mixed Signal FPGAs. This ecosystem is intended to specifically address the following markets/applications: Power Metering and Smart Grid, Motor Control (PMSM, BLDC, Stepper), Human-Machine Interfaces, Displays and Field Devices. A week later, Microsemi announced their comprehensive product portfolio for solar power applications which includes computing devices (SmartFusion) but also analog and switching components (IGBT, diodes, etc.) – which is the logic result of the Microsemi’s acquisition of Actel during fall 2010 (on this thread read this). Unfortunately, no news on the announced SmartFusion-based motor control development kit during the year, but those who did attend APEC 2011 at Forth Worth, TX, have had the chance to have a look at Microsemi’s SmartFusion FPGA-based motor control development kit at Alizem‘s booth:

Microsemi's SmartFusion FPGA-based Motor Control development kit

On Xilinx’s side, 2011 has been an important year with the release of their new ARM-based Zynq devices and also the release of a new Xilinx Spartan6 FPGA-based motor control development kit. The big news regarding Xilinx’s Zynq for FPGA-based motor control designers is that it has integrated A2D converters, an element that’s crucial to advanced motor drives systems. Except Microsemi’s SmartFusion, no FPGA vendor had a device with integrated A2Ds and this was certainly one important point missing against conventionnal devices (DSPs & MCUs) which all have integrated A2Ds for control system applications. According to Xilinx, this new Zynq device is going to be in production by the end of 2012 and it is positionned as a device that’s more than a processor, more than an asic and more than an fpga.

On Altera’s side, a new Motor Control development kit has been released during the summer and based on Arrow’s BeMicro low-cost form factor (145$). This platform is intended as an introductory platform for new comers in FPGA-based embedded system design which may then proceed to more advanced system design using already available Arrow’s MotionFire and EBV’s Falcon Eye Altera FPGA-based motor control development kits. Regarding devices, Altera has also made a move toward ARM-based system with their SoC FPGA and released a specific white paper for motor control using SoC FPGA. On a more educationnal side, Altera has released many publications this year intended specifically to FPGA-based motor control system designers such as 4 reasons why FPGA are right for Motor Control.

While we haven’t hear very much about Lattice in motor control / power electronics apps for a while, 2011 has been an exception with the release of a new LatticeECP3 Versa Development Kit in April. This kit is intended to be used in many computing intensive applications including Solar Panel Controllers and Data Acquisition & Control and also Video Transmission and Repeaters, Video Image Signal Processing, Camera Controllers, Network Traffic Management and Resilient Network Construction.

Motor control “apps” / subsystem IP

Over the years, this blog has published some articles explaining why the concept of “Motor Control IP/apps” – as a way to externalize/outsource motor control expertise – is an innovative and interesting option to motor control system designers to achieve their system performance while reducing cost and time to market (read Motor Control IC vs Motor Control IP and Why FPGAs are better than DSPs for Motor Control ?). I did present a synthesis of those ideas as invited speaker at the e-Drive’s Motor, Drive & Automation System conference in San Antonio, TX, in March and the presentation has now been viewed online more than +1300 times. Those ideas are inline with the concept of “Subsystem IP” which is now perceived as a key part in “Imminent EDA Transformation” and the “Core of Modern Semiconductor Design“. The whole idea of an “apps-store” for embedded systems is now taking reality with the recent launch of the ARM/Avnet Embedded Software Store and also the D&R Embedded: this is probably only the beginning. Hence, ideas from only a couple years ago are definitely taking place and are changing ways to approach the difficult task of embedded system design.

What to expect in 2012?

This is always a tricky question to address but if you follow this blog regularly, you can see a momentum building toward greater adoption of FPGAs as electronic system platform for motor drive systems design and “IPs/Apps” as building blocks for motor drive system designers. Having now the major FPGA companies aligned on this market is definitely a good indicator. Regarding this blog, you may expect some change toward more content on the “IPs/Apps” side (i.e. pure motor control algorithms/software) not only oriented toward FPGA, but also toward other electronic devices on the market. More on this later in 2012…

Meanwhile, thanks for your interest and I wish you success in your power electronics system design in 2012 !

FPGA-based Controllers – IEEE Industrial Electronics Mazagine March 2011

Another great ‘survey’ article has been written by Dr. Éric Monmasson and his team and published in the IEEE Industrial Electronics Magazine of March 2011 and titled ‘FPGA-based Controllers – Different Perspectives of Power Electronics and Drives Applications’. Here’s the abstract of their article:

This article presents the benefits of using field-programmable gate array (FPGA)-based controllers for power electronics and drive applications. For this purpose, an algorithm perspective is first proposed, where it is stated that, depending on the intrinsic parallelism properties as well as level of complexity, it makes sense to implement each control algorithm on a specific hardware and/or software architecture to get the best performances in terms of execution time or the best ratio performance versus cost. Then, an application perspective is proposed where the constraints specifically linked to the control of power converters are discussed.

You may access it here on the IEEE Xplore.

FPGA Technology as a Platform for Innovation Integration in Motor Drives Apps

For those who didn’t have the chance to be at e-Drive’s Motor, Drive & Automation System conference in San Antonio, TX last march, you may have a look at the slides of my presentation :

Note: this presentation has been tailored to be given to a motor drives specialist audience, not to a FPGA-based embedded system designers audience.

Why FPGAs are better than DSPs for Motor Control ?

That’s the main question I have been asked at last IEEE Energy Conversion & Congress Expo (ECCE2010) at Atlanta last month where Alizem had its booth demoing its COTS Motor Control IP for Pump and Fan Applications released last spring (see white paper and datasheet on Alizem’s website).

The answer to this question may be similar to asking if the latest Lady Gaga album is better on CD or as mp3 files running on an iPod. Technically, the IP performance (the music) is going the be the same on both platforms, the difference is the IP form factor and all its implications for the singer, the music platform manufacturer and the user. CDs need to be manufactured, delivered, may be scratched, stolen, etc. while mp3 files (whatever the format) are pure IP that can be easily dowloaded from anywhere at practically no cost, has higher margins, no degradation over time, etc. I already did that kind of exposé in by Motor Control IC vs Motor Control IP blog post.

On another perspective, if we strictly consider FPGA vs DSP chip for motor control (and in a general embedded system design perspective) it is obvious that DSP wins the battle. Why ? Because FPGAs are blank chips while DSP are chips having built-in processor & peripherals meaning that out-of-the box you can begin to develop your application software on a DSP while you cannot on an FPGA (you need to design the HW layer first then proceed to SW development). Hence FPGAs have one level of complexity higher than DSP and while this can become on one side an advantage (increased flexibility for new features bringing more value) it is on the other side a disadvantage because the same solution is going to cost more and take more time to develop (based on the same engineering methodology which to build everything in-house from scratch). We are not even talking about the fact that most motor control people are currently DSP/MCU users hence have not necessarily the skills for HW development.

Hence the strict FPGA approach doesn’t offer to motor control designer to have “more with less” compared to DSP. At that level, the only tangible advantage for FPGAs is to provide to motor control system designer a single design environment where the complete system – HW&SW – can be developped (as opposed to the conventional approach where each chip has its own tools that needs to be learnt and where lots of time is invested in component integration).

To overcome this problem, we need to consider “FPGA & IP” vs DSP. That is completely different. With an FPGA & IP approach, the HW development phase is reduced to its minimum which is to integrate IP components together (processor IP, motor control IP, communications IP, HMI IP, etc.). While this process can be a nightmare if not done correctly, it takes only a few minutes if done with the correct tools (e.g. using SOPC Builder in the case of Altera FPGAs – hence their slogan ‘from ideas to system in minutes’ – or using Xilinx’s Platform Studio).

Real gains over DSP approach are made by using system components around the processor that are application-specific (here’s a great blog article on application-specific intellectual property, ASIP): not only the designer has the freedom to select IP components that strictly fits its design (no more, no less), but his IP providers are continously working to improve them to specifically fit their needs (this goes beyond traditionnal processor peripherals) hence providing always more value over time (wheter functionnal features and/or reducing integration time).

For motor control systems, that means passing from one-fits-all/generic PWM blocks and transducer interfaces (to be configured by the system designer) to specific (pre-configured) motor control block that includes PWM, transducers interfaces and software drivers running on a FPGA embedded processor (read this white paper for more details). That processor can even be the same processor that you have always been using but integrated on an FPGA (I am refering here to Freescale’s ColdFire processor that’s available as IP for Altera FPGAs, there’s certainly more to come) !

DSP

FPGA

FPGA & IP

Out-of-the-box experience

Great.

Low.

Great.

Processor

Fixed.

None.

Configurable.

HW components (peripherals)

Fixed.

None.

Configurable.

System components integration

Tedious (HW)

Easy (SW).

Easy (SW)

Requires Motor Control expert

Yes.

Yes.

No.

Cost of HW/SW maintenance

High.

Very High.

Low.

In this scheme, we can see a shift of the “secret” motor control sauce from the system designer to the (application-specific) IP provider. In reality, the real secret sauce is always in the hands of the motor control system designer which is to build the best machine for a targeted application. By leveraging motor control IP in his design, he can invest his time and ressources in doing a better sauce, quicker and cheaper.

All this happens by considering the FPGA chip as a system integration platform for third-party IP where gains (leading to lower TCO) come from ease of component integration (software integration) in a single design environment and leverage of outsourced domain expertise through IP procurement/reuse, especially in the case of very complex applications such as motor control.

FPGAs and Plug-in Hybrid Vehicles

During the summer, I have had the chance to drive during one week one of the five Toyota Plug-in Hybrid currently under test in Canada. Those vehicles are part of a experimental project involving Toyota and canadian universities, among them Université Laval and its power electronics lab LEEPCI (my former lab). Click here to see the public announcement made with Toyota during the summer.

The vehicle is actually working very fine and it is a real pleasure to drive. For those interested, I did use only 3L of gas for normal use during the week (around 80km) which is very energy efficient! Click on the figure below to see more pictures of the car :

Where’s the link with this blog ? EV are obviously heavy power electronics applications by being used to convert energy stored in the batteries to the motor and vice-versa (motor to batteries while braking). Where’s the link with FPGAs? You may be interested to read this SAE Report written by Delphi people in 2006 and titled “FPGA considerations for Automotive applications”. According to its authors,

The complexity of automotive products will continue to increase, even as the pressure to decrease the development cycle, decrease cost, and increase quality and reliability mounts. FPGA usage to meet application needs will continue to grow as a means of reducing cycle time and development costs. Understanding and developing all aspects of FPGA manufacturing, design, implementation, application usage and performance can address the quality and reliability aspects of using FPGAs as product solutions. A low unit cost should not be the only major driving factor in choosing an FPGA. It has been shown that there are other items that can significantly add to unit cost based on the design methodology used for the implementation and verification of an FPGA. The complexity and challenge of implementing an FPGA device will erode any advantages of a traditional design flow. FPGA development requires discipline in assuring adherence to robust practices.

Briefly, they mean to have a look to the total cost of ownership (TCO) against other IC solutions.

Smart Grid : An opportunity for FPGAs in Home Appliance space?

According to this EEtimes article, the Association of Home Appliance Manufacturers (AHAM) took the opportunity of being at the United Nations Climate Change Conference in Copenhagen to release a very well written 25 pages document titled “The Home Appliance Industry’s Principles & Requirements for Achieving a Widely Accepted Smart Grid“. In this document, the AHAM – based on its unique perspective to the Smart Grid Vision – is intended to provide three essential requirements for the Smart Grid’s interaction with consumers in order for the Smart Grid to be successful. Among those three requirements, the second one is the most interesting from a technological (embedded systems) perspective :

Communication Standards must be open, flexible, secure, and limited in number

This requirements then splits in four requirements : open, flexible, secure and limited in number.

From a FPGA perspective, flexible sounds very familiar because its embedded in the name of the technology itself : Field-Programmable. But is this flexibility may solve problems and help the development of Smart Grid enabled homes ? According to the authors,

Smart Grid enabled homes will have varying levels of sophistication, depending on the type of appliances, devices, and networks that are installed. There are many configurations, combinations, and options for energy management inside the home. Some possibilities could include a simple email notice for a manual demand response by the consumer, a smart meter directly communicating with a specific appliance to ask it to turn on and off, or a meter communicating with a Programmable Communicating Thermostat allowing for temperature adjustment.”

From now to the moment that every appliance is going to talk the same language – even with such standardization, that is limited to the US only – one can think that this is going to be long and costly. This process has been started since a long time on industrial side (with many types of protocols) and there is still no single communication standard. Altera and Xilinx are actually taking advantage of this massive willingness to connect but protocol-segmented environment. Their programmable chip solutions enables them to sell a platform on which industrial equipment manufacturers can then use to build their own platform which is going to be finally customized with a regional/market-specific set of IP blocks. This approach enables flexibility while also reducing costs and time to market.

Is the same idea is going to happen in Home Appliance space ? As we all know, this high-volume market is very focused on costs. Not considering smart grid, a chip to chip price analysis would probably give only small chances to FPGAs. But considering that :

– according to a recent Whirlpool survey, 84% of consumers choose energy – not water or time – as most important when it comes to home appliance efficiency, and that

– according to Electric Power Research Institute, the implementation of Smart Grid technologies could reduce electricity use by more than 4 percent by 2030 providing a mean savings of $20.4 billion for businesses and consumers,

… there may have an opportunity there for FPGA chip manufacturers. Among the most important ones, Altera is already there.

Using NI CompactRIO for FPGA-based motor control in Factory Automation

Here’s a recent article written by Greg Crouch, Embedded Systems Business Director at National Instrument., on the topic of FPGA-based motor control for Factory Automation.

Embedded-machine builder EUROelectronics reduced power use with FPGA-based field-oriented control (Source : National Instruments)

FPGA-based algorithm control delivers better efficiency than microprocessors can achieve. A wide range of control-system algorithms are available, including trapezoidal, sinusoidal and field-oriented.

Trapezoidal, or six-step, control is the simplest but lowest-performance method. For each of the six commutation steps, the motor drive provides a current path between two windings while leaving the third motor phase disconnected. However, torque ripple causes vibration, noise, mechanical wear and greatly reduced servo performance.

Sinusoidal control, also known as voltage-over-frequency commutation, addresses many of these issues. A sinusoidal controller drives the three motor windings with currents that vary smoothly. This eliminates torque ripple issues and offers smooth rotation.

More information on NI CompactRIO can be found directly on their website.

Altera FPGA in Motor control solutions for industrial applications

Here’s a recent brochure from Altera on Motor control solution in industrial space.

While microcontrollers and DSP devices may be well suited to certain aspects of motor control systems, they lack flexibility to support motor control IP and interfaces in hard logic. With our Cyclone® III FPGA, you can integrate processors, digital logic interfaces, DSP functions, motor control IP and multiple Industrial Ethernet protocols into one device, reducing board size and complexity. Operating across industrial communication networks, motion control solutions with drive-controlled motors can be very energy efficient. Aside from saving power, this can also lead to net cost savings in the long run.”

Source: Altera

It may be important to mention that this type of system architecture in industrial space – with industrial ethernet connection – is “smart-grid” ready, i.e. information is going in two direction : to the motor drive system for motor control and from the motor drive system for condition-monitoring purposes.

In that latter case, the motor drive system may become a “broadcaster” of useful information to the main control system if the Motor Control IP contains fault-detection and diagnosis algorithms that are running simulataneously with torque and speed control algorithms.

Acromag goes green with FPGA solutions in Wind Turbine Control applications

Here’s a very small article from Acromag positionning its FPGA products toward smart-grid and Wind Turbine Control applications.

The basic components of a control system to maximize energy capture from a wind turbine include: rotor pointing, blade speed regulation, minimization of pointing and pitch control, and the mitigation of disturbances (i.e. excessive rotor speed, wind gusts, etc.). Additionally, the environment inside the rotor head, or nacelle, is very hostile. Any control device used in this environment must be self-diagnostic, rebootable, extreme temperature tolerant, vibration tolerant, and of course, affordable.”