FPGA Technology and Software IP in Power Electronics Applications

Why developing power electronics embedded software is so hard ?

Here is a figure I did use in a recent presentation explaining why power electronics software is so hard to develop:

Hence, in order to create quality embedded software for power electronics applications, one must have advanced knowledge on :

  • the load (motor type, dynamics, etc),
  • the electrical source (topology of the power converter, devices technologies, etc.),
  • the electronics, i.e. the device on which the software is going to run and also transducers that are going to interface with the device and the system,
  • and embedded software development, of course.
Each of those topic is in itself a speciality and represent very different branches and cultures of electrical engineering (EE), i.e. ‘power’ vs ‘software’. Those cultures are so different that the following situation arises:
  • the ‘power engineer’ doesn’t know about software development and often minimize its importance (this most of the time leads to bad software development practices which makes the situation worse),
  • the ‘software engineer’ doesn’t know about power applications since this is way out of his traditionnal type of applications (web, internet, applicative) and neglect to consider that he is working with energy (i.e.  error is not leading to a blue screen but to a damaged system or to personel injury).
In a recent interview, I made an analogy with this situation naming embedded software for power electronics applications as the triathlon of electrical engineering. The best triathlete is not the perfect swimmer, the perfect cyclist or the perfect runner: he is the best at maximizing performance in those three sports.
It is the same with embedded software for power electronics applications and this is why it is so hard.

IEEE Industrial Electronics Society launches its TechNews (ITeN)

I am now a proud member of the editorial committee of the new IEEE IES ITeN :

The IE Technology News (ITeN) is a step forward to widen the reach of the IES by a free on-line publication. This provides the extended abstracts of a few timely, thought provoking articles from IES transactions, magazine and conference proceedings periodically. In addition, it also aims to report important society news, announcement and summaries of IES-conferences, brief outline of interesting tutorials (from IES-conferences) and promote activities of Technical Committees.  ITeN is supported by an editorial board with domain-experts from academia and industries and Technical Committees (through Chairs and Vice-Chairs) of IES.”

Click here to access ITeN on IES website.

Who can nominate a Paper to ITeN?

  • ALL Associate Editors of ITeN. This is the main job of AEs. They will check a potential paper (from TIE, TII, IEM and all IES sponsored conferences) in their areas and nominate a good one to the EIC,
  • Advisors, all past officers, all major award winners of IES, all AEs of TIE, TII and IEM
  • All General Chairs, Technical Program Chairs, Technical Track Chairs, SS Chairs and SS Organizers can nominate a conference paper
  • Self-nomination is not allowed.

You would like to submit a paper to ITeN ? Please let me know !

 

FPGA-based Controllers – IEEE Industrial Electronics Mazagine March 2011

Another great ‘survey’ article has been written by Dr. Éric Monmasson and his team and published in the IEEE Industrial Electronics Magazine of March 2011 and titled ‘FPGA-based Controllers – Different Perspectives of Power Electronics and Drives Applications’. Here’s the abstract of their article:

This article presents the benefits of using field-programmable gate array (FPGA)-based controllers for power electronics and drive applications. For this purpose, an algorithm perspective is first proposed, where it is stated that, depending on the intrinsic parallelism properties as well as level of complexity, it makes sense to implement each control algorithm on a specific hardware and/or software architecture to get the best performances in terms of execution time or the best ratio performance versus cost. Then, an application perspective is proposed where the constraints specifically linked to the control of power converters are discussed.

You may access it here on the IEEE Xplore.

FPGA-based motor control – A Review of 2010

This time of the year is a great moment to take a few steps back and observe what the last year has been made of and to speculate on what we can expect in 2011. We already know that 2010 has been a very important year for FPGAs with 47% growth in sales (check Kevin Morris’ recap article ‘Banner Year: 2010 in FPGAs in Review’). With no surprise, 2010 has also been a great year for FPGA-based motor control / power electronics apps, here are the highlights:

FPGA vendors and motor control kits

After Altera released 2 motor control kits in 2008 (Arrow’s MotionFire and EBV’s Falcon Eye), Xilinx and Microsemi have both announced the release of a new FPGA-based motor control kit. Actel/Microsemi did initially demo theirs at ESC in April 2010 while Xilinx have announced their new Targeted Design Platform at SPS/IPC/DRIVES 2010 conference.

At the same conference, Altera has announced new EBV’s three-level inverter demo for motor control and solar power conversion applications. It is interesting to see such demo featuring advanced inverter topologies (i.e. something different than usual two-level inverter) in which FPGA can uniquely differentiate and provide application’s improvement (three-level inverter reduce time-harmonics losses in the converter and the load but require more computation than conventional two-level inverter, more in this article showing 44% power loss reduction in wind power conversion apps).

It is worth mentionning that National Instruments – with their FPGA-based CompactRIO platform – has made noticeable appearance at the EETimes Virtual Conference on Motor Control (having Altera & Texas Instrument as Gold sponsors) with NI’s VP of Industrial and Embedded Product Lines as keynote speaker.

Alizem COTS Motor Control IP

In May 2010, Alizem has released its COTS Motor Control IP for Pump and Fan applications for Altera FPGAs. It is the first application-specific COTS Motor Control IP to be designed and sold as a plug-and-play virtual chip and meant to take advantage of FPGA technical capabilities to increase application performance and to be used by non-motor control and non-FPGA experts (see this blog articles article Motor Control IC vs Motor Control IP and also Why FPGAs are better than DSP for Motor Control ?). This IP has been demoed at ECCE2010 conference and has been the object of an article published by EETimes Programmable Logic Designline.

Some important articles

In August, Motion Control Association published an article of FPGA Motor Control (“Playing the field“) featuring Alizem, Xilinx and National Instruments. A great article on FPGA-based motor control has also been published by Xilinx (“Creating a Greener Future for Industrial Motor Control“) in october.

FPGA-as-a-platform

I think one of the biggest event in 2010 has been one that’s impacting not only Motor Control but any high-level embedded system applications which is the paradigm shift toward “FPGA-as-a-platform”, that is considering the FPGA not as a chip (like a DSP or MCU) both rather as a component (IP) integration platform (like a “software” PCB). Of course, this idea is not new (i.e. that’s not the first year that we are speaking about the concept of system-on-chip), but many important event have happened in 2010 that’s making it a reality.

One of them is Cadence’s EDA 360 manifesto (that’s directed to the whole electronic industry not only FPGA SoC design) which is about “apps-driven” design, i.e. making the application’s requirements at the center of system design instead of the current hardware-first paradigm. Apple’s iPhone has been used by many people in the industry as a concrete example of this new approach to system-level design (Steve Leibson, Daniel Nenni, Kevin Morris, Jim Turley, Brian Bailey and many others).

This shift in design approach is opening a system-level IP/apps era providing new levels of productivity to the system designer (Altera has already upgraded its own tools in that direction with Qsys). That’s exactly what’s needed in complex applications such as motor control where designers are still loosing so much time learning tools and demystiyfing motor control while they could spend this time working on their true product’s differentiation (if you have doubts about this, attend a motor control webinar given by any motor control IC vendor).

Is anything important missing ?

Please let me know. Meanwhile, I wish you success in 2011 in your FPGA-based power electronics applications design ! Thanks for your interest in reading this blog !

FPGAs and Plug-in Hybrid Vehicles

During the summer, I have had the chance to drive during one week one of the five Toyota Plug-in Hybrid currently under test in Canada. Those vehicles are part of a experimental project involving Toyota and canadian universities, among them Université Laval and its power electronics lab LEEPCI (my former lab). Click here to see the public announcement made with Toyota during the summer.

The vehicle is actually working very fine and it is a real pleasure to drive. For those interested, I did use only 3L of gas for normal use during the week (around 80km) which is very energy efficient! Click on the figure below to see more pictures of the car :

Where’s the link with this blog ? EV are obviously heavy power electronics applications by being used to convert energy stored in the batteries to the motor and vice-versa (motor to batteries while braking). Where’s the link with FPGAs? You may be interested to read this SAE Report written by Delphi people in 2006 and titled “FPGA considerations for Automotive applications”. According to its authors,

The complexity of automotive products will continue to increase, even as the pressure to decrease the development cycle, decrease cost, and increase quality and reliability mounts. FPGA usage to meet application needs will continue to grow as a means of reducing cycle time and development costs. Understanding and developing all aspects of FPGA manufacturing, design, implementation, application usage and performance can address the quality and reliability aspects of using FPGAs as product solutions. A low unit cost should not be the only major driving factor in choosing an FPGA. It has been shown that there are other items that can significantly add to unit cost based on the design methodology used for the implementation and verification of an FPGA. The complexity and challenge of implementing an FPGA device will erode any advantages of a traditional design flow. FPGA development requires discipline in assuring adherence to robust practices.

Briefly, they mean to have a look to the total cost of ownership (TCO) against other IC solutions.

Smart Grid : An opportunity for FPGAs in Home Appliance space?

According to this EEtimes article, the Association of Home Appliance Manufacturers (AHAM) took the opportunity of being at the United Nations Climate Change Conference in Copenhagen to release a very well written 25 pages document titled “The Home Appliance Industry’s Principles & Requirements for Achieving a Widely Accepted Smart Grid“. In this document, the AHAM – based on its unique perspective to the Smart Grid Vision – is intended to provide three essential requirements for the Smart Grid’s interaction with consumers in order for the Smart Grid to be successful. Among those three requirements, the second one is the most interesting from a technological (embedded systems) perspective :

Communication Standards must be open, flexible, secure, and limited in number

This requirements then splits in four requirements : open, flexible, secure and limited in number.

From a FPGA perspective, flexible sounds very familiar because its embedded in the name of the technology itself : Field-Programmable. But is this flexibility may solve problems and help the development of Smart Grid enabled homes ? According to the authors,

Smart Grid enabled homes will have varying levels of sophistication, depending on the type of appliances, devices, and networks that are installed. There are many configurations, combinations, and options for energy management inside the home. Some possibilities could include a simple email notice for a manual demand response by the consumer, a smart meter directly communicating with a specific appliance to ask it to turn on and off, or a meter communicating with a Programmable Communicating Thermostat allowing for temperature adjustment.”

From now to the moment that every appliance is going to talk the same language – even with such standardization, that is limited to the US only – one can think that this is going to be long and costly. This process has been started since a long time on industrial side (with many types of protocols) and there is still no single communication standard. Altera and Xilinx are actually taking advantage of this massive willingness to connect but protocol-segmented environment. Their programmable chip solutions enables them to sell a platform on which industrial equipment manufacturers can then use to build their own platform which is going to be finally customized with a regional/market-specific set of IP blocks. This approach enables flexibility while also reducing costs and time to market.

Is the same idea is going to happen in Home Appliance space ? As we all know, this high-volume market is very focused on costs. Not considering smart grid, a chip to chip price analysis would probably give only small chances to FPGAs. But considering that :

- according to a recent Whirlpool survey, 84% of consumers choose energy – not water or time – as most important when it comes to home appliance efficiency, and that

- according to Electric Power Research Institute, the implementation of Smart Grid technologies could reduce electricity use by more than 4 percent by 2030 providing a mean savings of $20.4 billion for businesses and consumers,

… there may have an opportunity there for FPGA chip manufacturers. Among the most important ones, Altera is already there.

Acromag goes green with FPGA solutions in Wind Turbine Control applications

Here’s a very small article from Acromag positionning its FPGA products toward smart-grid and Wind Turbine Control applications.

The basic components of a control system to maximize energy capture from a wind turbine include: rotor pointing, blade speed regulation, minimization of pointing and pitch control, and the mitigation of disturbances (i.e. excessive rotor speed, wind gusts, etc.). Additionally, the environment inside the rotor head, or nacelle, is very hostile. Any control device used in this environment must be self-diagnostic, rebootable, extreme temperature tolerant, vibration tolerant, and of course, affordable.”

OPAL-RT and Real-Time Simulation of Electric Motor Drives

FPGA technology in power electronics application is not only a matter of glue logic or system-on-a-chip platform but is also a matter of high-performance computing for real-time simulators of electric motor drives and any dynamic systems.

The use of FPGA in high-performance computing is not new: many applications have benefitted of the accelerated computing capabilities of those devices enabled by their parallelism capabilities, such as DNA sequencing and financial services. Since power electronics applications are typical fast-dynamic, complex and non-linear application, there might have a natural interest there to exploit accelerated computing platforms to simulate those systems in real-time.

This is exactly what OPAL-RT, a Montreal-based company, is doing : FPGA-based real-time simulators for power electronics applications. Their products enable system designers to quickly, safely and cheaply test their designs on a virtual plant. A typical example would be a PMSM-based system motor control designers that want to test his algorithms on many size of motors (2kW-5kW-15 kW) without having to plug its controller on a “real” motor : this designer can then plug its controller on a OPAL-RT “virtual” motor and test its motor control algorithm at a very early stage in its project (before having the real system protype available for example). The model of those “virtual” motors can be based on standard analytical equations or based on JMAG finite element analysis.

This type of technology opens a very broad range of new possibilities in the design of power electronics systems.

Actel Mixed-signal FPGA introduction for Motor Control

Here’s an interesting online tutorial presented by the famous Clive ‘Max’ Maxfield introducing Actel Fusion mixed-signal FPGA and how they can useful for Motor Control applications. A general introduction on FPGAs is presented for people that aren’t familiar with this type of technology (which typically the case for motor control system designers).

Hurry up : this tutorial is only available until August 15th 2009 !

Horses and FPGAs

Kevin Morris’ most recent article of FPGA and Structured ASIC Journal makes a very humourous but interesting analogy between FPGA vs ASICs design battle and the battle that occured not so long ago between car cars vs horses as a mean of transportation :

The new BMW 5-series sedan outperforms the horse and buggy in every important way. Your family will travel farther in a day and arrive less fatigued thanks to our superior cruising speed, climate-controlled cabin, and luxurious upholstery. It’s so much easier to use as well – no more hitching up the team before you start, and no more watering, feeding, and grooming at the end of the day. You just turn the key and drive away. Simple as that. So, before you snap up that new stallion you’ve been eyeing – consider a car instead.”

Morris’ article gets interesting at the end where he points out that applications that can benefit from hardware programmability are subject to profound change :

FPGA companies are defending against this attack, of course, by equipping their devices with both hard- and soft-core processors so that they can reap the advantages of software programmability as well. The outcome of that game, however, will probably be determined by the existence of design requirements that mandate hardware programmability – features where software cannot deliver the performance or power efficiency required. Designs with these sorts of requirements will remain in the sweet spot of FPGA, while general-purpose embedded platforms have a better-than-even chance of winning where software alone can do the job.”

This is obviously the case with power electronics applications.