FPGA Technology and Software IP in Power Electronics Applications

EDA Tool in the cloud: A web-based IOPT Petri Net Editor

A few weeks ago, I have been pleased to attend IECON2013 in Vienna and had the chance to meet my friend Luis Gomes from the University Nova of Lisboa, Portugal. While discussing together, he took some time to give me some details about a web-based framework that he designed with his team. This framework is called “IOPT-Tools” and this is a on-line Petri Net editor. Petri nets are useful to modelize any type of process and are used in many different applications (e.g. workflow management or UAV fault diagnostics).

What’s cool about this tool (other than being web-based, i.e. not having to install it on your desktop computer) is that once your have modelized your system, you can run all sorts of analysis to validate system behavior and even automatically generate VHDL code or C code to embed your model inside a controller. Here is a screen shot of a model used for BLDC motor commutation:

ioptbldc

This tool in totally in line with current discussions in the EDA community regarding the migration of EDA tools in the cloud (see Cadence blog or Synopsis blog on this). EDA in the cloud in the idea of having tools for chip/embedded system design being offered as Software-As-a-Service (SaaS) and running on powerful servers so that even small teams could leverage important computing power they could not afford otherwise. With the rising complexity of chip design, it is well known that always more computing power is needed to compile designs and the solution won’t come from the standard computing solutions.

Congrats to the team of Dr. Gomes for their vision in developping this new tool ! You can access it and use it right now for FREE by following this link.

For more information regarding this tool, you can also consult some publications on the IEEE Explore. If somehow you use this tool and want to publish an article at the next IEEE IES IECON2014 conference in Dallas, TX, watch for the Call for Paper here.

FPGA-based Motor Control and Motor Control Software IP – A review of 2012

Here is my review of the main events that have happened in 2012 in the world of FPGA-based motor control and Motor Control Software IP.

A new kit from Microsemi and Trinamic

In February, Microsemi and Trinamic did release their new Motor Control Software development kit. This new kit combines three features crucial for successful implementation of complex motor control algorithms: an embedded microcontroller, programmable analog fabric, and programmable digital (FPGA) fabric. This kit is built around Microsemi’s SmartFusion chip and embedded ARM Cortex M-3 processor. It is bundled with stepper motor and BLDC motor. Here’s the video that’s been presented at DesignWest 2012. Of course, one key feature of Microsemi is their analog part that can be used for motor sensing leading to reductions of  overall system complexity and operational costs.

Microsemi did also release its new SmartFusion2 in october mentionning they are already have engagement from customer building critical systems in a broad range of applications including flight data recorders, weapons systems, defibrillators, handheld radios, communications management systems and industrial motor control.

On Altera, Xilinx and Lattice side

No new kit have been released from Xilinx and Altera this year, only one from Lattice. Actually, this kit is not intended for “motor control” specifically but rather for “complex system control” in general and also “video interface design”. According to the previous article, the kit offers a wealth of other built-in system resources that engineers can use to build realistic system prototypes with both digital and analog control‚ human interfaces (electret microphone‚ speaker/headphone‚ LED) and a wide variety of interfaces to external devices and systems (USB 2.0‚ microSD‚ GPIO).

In October, Xilinx did release a new PWM IP that specically releverage FPGA properties to reduce the level of noise compared to standard PWM. This is particularly refreshing to see this since advanced PWM is certainly a domain where FPGA can have and advantage compared to more conventionnal devices since it involves complex calculations at high speed. This is something I did mention in my “Electric motor power savings: The true impact of the device selection” post.

Altera did release its new framework in November 2012 at SPS/IPS Drives conference that is a design environment that help motor control system designer to leverage the different Altera EDA tools in its FPGA-based motor control design process. This framework contains a “drive-on-a-chip” reference design that can be used with the EBV kit or the INK kit.

 

New Motor Control IP for Altera FPGAs from Alizem

After having released its new on-line boutique in October, Alizem did release its new off-the-shelf motor control software IP for Altera FPGAs. This new software has been tested on real motors from 30W to 86kW and includes many debugging functions for the power stage, the transducers and system protection that helps the motor control system designer in developping new systems safer, cheaper and faster. This new motor control software IP has received AMPP certification in december.

This product is completely in-line with my presentation at IECON2012 on the topic of “FPGA-based Custom Motor Drives Design: The Role of 3rd-party System-Level IP“.

What to expect in 2013 ?

With increased market pressure for lower costs and more innovations, the field of custom motor drives is expected to be more in demand in 2013 and the coming years. According to this market reserach, custom design and manufacturing of an inverter’s sub-unit is driving the modular approach accross applications. According to the same study, major changes are happenning accross the supply chain because power electronics often requires having several types of knowledge and experience gained know-how in mechanics, electronics, semiconductors, electrics, fluidics and hydraulics, and connectors and its development can be complicated and final products expensive.

 Is there anything missing ?

Please let me know by sending me a message via Twitter. You can also contact me on any question you would like me to address on the field of FPGA-based motor control and motor control software IP.

Thanks for reading my blog, I hope you find it useful.

FPGAs and Plug-in Hybrid Vehicles

During the summer, I have had the chance to drive during one week one of the five Toyota Plug-in Hybrid currently under test in Canada. Those vehicles are part of a experimental project involving Toyota and canadian universities, among them Université Laval and its power electronics lab LEEPCI (my former lab). Click here to see the public announcement made with Toyota during the summer.

The vehicle is actually working very fine and it is a real pleasure to drive. For those interested, I did use only 3L of gas for normal use during the week (around 80km) which is very energy efficient! Click on the figure below to see more pictures of the car :

Where’s the link with this blog ? EV are obviously heavy power electronics applications by being used to convert energy stored in the batteries to the motor and vice-versa (motor to batteries while braking). Where’s the link with FPGAs? You may be interested to read this SAE Report written by Delphi people in 2006 and titled “FPGA considerations for Automotive applications”. According to its authors,

The complexity of automotive products will continue to increase, even as the pressure to decrease the development cycle, decrease cost, and increase quality and reliability mounts. FPGA usage to meet application needs will continue to grow as a means of reducing cycle time and development costs. Understanding and developing all aspects of FPGA manufacturing, design, implementation, application usage and performance can address the quality and reliability aspects of using FPGAs as product solutions. A low unit cost should not be the only major driving factor in choosing an FPGA. It has been shown that there are other items that can significantly add to unit cost based on the design methodology used for the implementation and verification of an FPGA. The complexity and challenge of implementing an FPGA device will erode any advantages of a traditional design flow. FPGA development requires discipline in assuring adherence to robust practices.

Briefly, they mean to have a look to the total cost of ownership (TCO) against other IC solutions.

Switching from ASIC to FPGA for SoC Design

While this may not be the exact case of typical power electronics system designers (who mostly design by integrating off-the-shelf MCU and DSP chips), this article written by Geoffrey James is giving a good picture of the current state of FPGA technology and design tools for SoC design :

Trend #1: Today’s FPGAs are gaining features appropriate for SoCs.

Trend #2: The FPGA tool sets are becoming more sophisticated.

Trend #3: SoCs are proliferating into a wider range of products.

Trend #4: Converting from FPGA to ASIC is constantly getting easier.

This may give a hint to typical power electronics system designers who are mostly not familiar with FPGA technology.

Motor Energy Efficiency, Power Factor and Actel mixed-signal FPGAs

Here’s a very extensive article written in two parts (part 1 here, part 2 here) by John Smitty of Actel Corporation.

According to Smitty, “the potential energy savings are staggering. Over 40 million electric motors are used in manufacturing operations in the United States alone. Electric motors account for 65 to 70 percent of industrial electrical energy consumption and approximately 57 percent of all electrical consumption worldwide. Saving even a few percent of the world’s estimated 16,000-plus terawatt-hours (TWh) annual consumption of electricity amounts to several hundreds of trillions of watt-hours per year.”

High-performance motor control design is one way to achieve those energy savings and this may be done using DSP chips but those rapidly limited because “they are sequential state machines that can only do a very limited amount of computation in a single clock cycle“. Here’s how the author explains why mixed-signal FPGAs can overcome this situation:

Unlike DSPs, the mixed-signal FPGA can do many computations in parallel, and can do certain specialized computations such as computing sines and cosines (which are generally required by these algorithms) much faster than most any DSP microcontroller, at a lower cost per computation. As a bonus, FPGAs invariably consume less power than any type of microcontroller doing the same function“.

Also, “FPGAs offer much flexibility. For instance, if your algorithm requires an extra PWM, it can easily be added to an FPGA solution. PWMs pre-built into a DSP or ASSP integrated circuit may or may not perform the PWM algorithm you want, or take into consideration the needs of your power circuitry. With an FPGA, the PWM can be customized exactly to your specifications. An FPGA can be adapted to accept most any type of feedback sensor (encoder, Hall effect, or tachometer, for example) or a sensorless algorithm based upon motor back-EMF measurements can be implemented“.

OPAL-RT and Real-Time Simulation of Electric Motor Drives

FPGA technology in power electronics application is not only a matter of glue logic or system-on-a-chip platform but is also a matter of high-performance computing for real-time simulators of electric motor drives and any dynamic systems.

The use of FPGA in high-performance computing is not new: many applications have benefitted of the accelerated computing capabilities of those devices enabled by their parallelism capabilities, such as DNA sequencing and financial services. Since power electronics applications are typical fast-dynamic, complex and non-linear application, there might have a natural interest there to exploit accelerated computing platforms to simulate those systems in real-time.

This is exactly what OPAL-RT, a Montreal-based company, is doing : FPGA-based real-time simulators for power electronics applications. Their products enable system designers to quickly, safely and cheaply test their designs on a virtual plant. A typical example would be a PMSM-based system motor control designers that want to test his algorithms on many size of motors (2kW-5kW-15 kW) without having to plug its controller on a “real” motor : this designer can then plug its controller on a OPAL-RT “virtual” motor and test its motor control algorithm at a very early stage in its project (before having the real system protype available for example). The model of those “virtual” motors can be based on standard analytical equations or based on JMAG finite element analysis.

This type of technology opens a very broad range of new possibilities in the design of power electronics systems.

Actel Mixed-signal FPGA introduction for Motor Control

Here’s an interesting online tutorial presented by the famous Clive ‘Max’ Maxfield introducing Actel Fusion mixed-signal FPGA and how they can useful for Motor Control applications. A general introduction on FPGAs is presented for people that aren’t familiar with this type of technology (which typically the case for motor control system designers).

Hurry up : this tutorial is only available until August 15th 2009 !

FPGA-based Motor Control Design – A new era has come in power electronics

The movement has been going on for a few years and it accelerates. From specialized digital signal processing chips mainly used in communication applications, FPGA manufacturers have entered in the embedded system market to compete DSP and MCU chips.

Regarding raw computing performances (and not considering cost and design methodology), it is generally accepted that FPGAs, with their inherent parallelism capabilities, outperforms DSPs by many order of magnitude. This has a positive impact on performance on computional intensive applications such as digital signal processing and real-time control.

Knowing that more than 60% of electric power in the industrialized world is used to power electric motors, motor real-time control is an important application that can potentially take advantage of the high computing capabilities of FPGA-based embedded systems. Variable-speed motor drives are power electronics applications that have time-variant parameters and non-linear dynamics in which complex calculations must be achieved in real-time at high frequency to get optimal performance. Crunching numbers at high speed, this is exactly where FPGA can perform.

How motor control applications can benefit from FPGA technology ? What can a low-cost programmable hardware and software chip make better than a DSP or a MCU chip ?

There’s is no obvious answer to those questions and it must be looked not only on the technical perspective (performance gains), but also on a engineering perspective (better reliability) and a business perspective (cost reductions). Each of those perspective are going to the subject of subsequent posts.